I2C时序配置表

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I2C 时序设置表

选取ICR的值即可设置SCl divider,SDA Hold value,SCL Hold(Start、stop)Value I2C时序设置表请参考K60P144M100SF2RM Page.1468

SDA Hold Time,SCL Start Time,SCL Stop Time的详细解释

  • I2C baud rate = bus speed (Hz)/(mul × SCL divider)
  • SDA hold time = bus period (s) × mul × SDA hold value
  • SCL start hold time = bus period (s) × mul × SCL start hold value
  • SCL stop hold time = bus period (s) × mul × SCL stop hold value
 
//  SDA:________...................____________
//  ............ \________________/
//  SCL:___________..............______________
//  ...............\___________/
//  ...........|...|...........|...|
//  ........SCL Start Time..SCL Stop Time

SCL hold start time

SCL 开始时间 :SDA的下降沿到SCL由高电平变为下降沿之间的时间
the delay from the falling edge of SDA (I2C data) while SCL is high (start condition) to the falling edge of SCL (I2C clock).

SCL hold stop time

SCL 停止时间 :SCL的上升沿到SDA变为上升沿且SCL为高电平之间的时间
The SCL stop hold time is the delay from the rising edge of SCL (I2C clock) to the rising edge of SDA (I2C data) while SCL is high (stop condition).

 
//  SDA:..........______
//  ...._________/
//  SCL: _______|...|
//  ..../.......\_______
//  ............| |
//  ..........SDA Hold Time

注意:

  1. 其中mul = 1,SCL divider、SDA hold value、SCL start hold value、SCL stop hold value

可以通过查找I2C时序配置表获得,I2C时序设置表在本文件结尾处.

  1. bus speed(Hz)是单片机的外设总线频率,可以通过K60_card.h中的BUS_CLK_MHZ宏定义进行设定.
  2. bus period (s)= 1/bus speed(Hz).
  3. SCL总线频率最大400Khz.